82 search results - page 6 / 17 » Functional Testing of Microprocessors with Graded Fault Cove... |
VTS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper we investigate optimal voltage testing approaches for physically-based faults in CMOS circuits. We describe the general nature of the problem and then focus on two f...
DAC
2006
ACM
13 years 9 months ago
2006
ACM
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
ICCAD
2000
IEEE
13 years 12 months ago
2000
IEEE
A method to select the lengths of functional sequences in a BIST scheme for scan designs is proposed in this paper. A functional sequence is a sequence of primary input vectors ap...
ESEM
2009
ACM
13 years 11 months ago
2009
ACM
Test coverage is a promising measure of test effectiveness and development organizations are interested in costeffective levels of coverage that provide sufficient fault removal w...