409 search results - page 15 / 82 » Functional Validation of Programmable Architectures |
DAC
2002
ACM
14 years 9 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
PDP
2006
IEEE
14 years 2 months ago
2006
IEEE
— The Parallel Resource-Optimal (PRO) computation model was introduced by Gebremedhin et al. [2002] as a framework for the design and analysis of efficient parallel algorithms. ...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
FPGA
1998
ACM
14 years 1 months ago
1998
ACM
In this paper, we developed Boolean matching techniques for complex programmable logic blocks (PLBs) in LUT-based FPGAs. A complex PLB can not only be used as a K-input LUT, but a...
DAC
1997
ACM
14 years 29 days ago
1997
ACM
The biggest obstacle in the formal verification of large designs is their very large state spaces, which cannot be handled even by techniques such as implicit state space travers...