409 search results - page 25 / 82 » Functional Validation of Programmable Architectures |
CSREAESA
2006
13 years 10 months ago
2006
: The explosive growth of internet traffic and the increasing complexity of the functions performed by network nodes have given rise to a new breed of programmable micro-processors...
TCAD
2008
13 years 8 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
PPOPP
2010
ACM
14 years 3 months ago
2010
ACM
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
ARCS
2009
Springer
14 years 3 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...