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FPL
2010
Springer
188views Hardware» more  FPL 2010»
13 years 6 months ago
SeqHive: A Reconfigurable Computer Cluster for Genome Re-sequencing
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
Kristian Stevens, Henry Chen, Terry Filiba, Peter ...
CODES
2001
IEEE
14 years 15 days ago
The TACO protocol processor simulation environment
Network hardware design is becoming increasingly challenging because more and more demands are put on network bandwidth and throughput requirements, and on the speed with which ne...
Seppo Virtanen, Johan Lilius
CASES
2009
ACM
14 years 3 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
IPPS
2007
IEEE
14 years 3 months ago
ParalleX: A Study of A New Parallel Computation Model
This paper proposes the study of a new computation model that attempts to address the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and th...
Guang R. Gao, Thomas L. Sterling, Rick Stevens, Ma...
IROS
2007
IEEE
111views Robotics» more  IROS 2007»
14 years 3 months ago
Design of a modular snake robot
— Many factors such as size, power, and weight constrain the design of modular snake robots. Meeting these constraints requires implementing a complex mechanical and electrical a...
Cornell Wright III, Aaron Johnson, Aaron Peck, Zac...