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» Functional Validation of System Level Static Scheduling
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ECRTS
2003
IEEE
14 years 28 days ago
Establishing Timing Requirements and Control Attributes for Control Loops in Real-Time Systems
Advances in scheduling theory have given designers of control systems greater flexibility over their choice of timing requirements. This could lead to systems becoming more respon...
Iain Bate, Peter Nightingale, Anton Cervin
ETS
2007
IEEE
91views Hardware» more  ETS 2007»
14 years 2 months ago
PPM Reduction on Embedded Memories in System on Chip
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
Said Hamdioui, Zaid Al-Ars, Javier Jiménez,...
RTSS
2008
IEEE
14 years 2 months ago
Delay-Aware Period Assignment in Control Systems
We consider the problem of optimal static period assignment for multiple independent control tasks executing on the same CPU. Previous works have assumed that the control performa...
Enrico Bini, Anton Cervin
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 8 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
CODES
2007
IEEE
14 years 2 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...