396 search results - page 6 / 80 » Functional Validation of System Level Static Scheduling |
DATE
2005
IEEE
13 years 9 months ago
2005
IEEE
Developing a functional prototype of a system-on-chip provides a unifying vehicle for model validation and system refinement. Keeping the prototype executable everal abstraction l...
NOMS
2002
IEEE
2002
IEEE
Design of a network level management information model for automatically switched transport networks
14 years 16 days ago
The concept of Automatically Switched Transport Networks (ASTN) combines elements of distributed connection management from the IP world with classical transport network functiona...
INFOCOM
2003
IEEE
14 years 27 days ago
2003
IEEE
— Channel-aware scheduling strategies, such as the Proportional Fair algorithm for the CDMA 1xEV-DO system, provide an effective mechanism for improving throughput performance in...
CP
2007
Springer
14 years 1 months ago
2007
Springer
The increasing levels of system integration in Multi-Processor System-on-Chips (MPSoCs) emphasize the need for new design flows for efficient mapping of multi-task applications o...
ICASSP
2009
IEEE
14 years 2 months ago
2009
IEEE
Dataflow descriptions have been used in a wide range of Digital Signal Processing (DSP) applications, such as multi-media processing, and wireless communications. Among various f...