Sciweavers

396 search results - page 8 / 80
» Functional Validation of System Level Static Scheduling
Sort
View
PATAT
1997
Springer
107views Education» more  PATAT 1997»
13 years 11 months ago
A Comparison of Annealing Techniques for Academic Course Scheduling
In this study we have tackled the NP-hard problem of academic class scheduling (or timetabling) at the university level. We have investigated a variety of approaches based on simu...
M. A. Saleh Elmohamed, Paul D. Coddington, Geoffre...
TVLSI
2008
152views more  TVLSI 2008»
13 years 7 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 1 months ago
A Time Slice Based Scheduler Model for System Level Design
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 2 months ago
Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Timing Constraints
In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarante...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
BIRTHDAY
2003
Springer
13 years 11 months ago
Aspect Validation Using Model Checking
Aspects are intended to add needed functionality to a system or to treat concerns of the system by augmenting or changing the existing code in a manner that cross-cuts the usual c...
Shmuel Katz, Marcelo Sihman