Sciweavers

79 search results - page 6 / 16
» Functional Verification of Large ASICs
Sort
View
CODES
2007
IEEE
14 years 1 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
CODES
2008
IEEE
13 years 8 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
DAC
2005
ACM
14 years 7 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
CVPR
2005
IEEE
14 years 8 months ago
Learning a Similarity Metric Discriminatively, with Application to Face Verification
We present a method for training a similarity metric from data. The method can be used for recognition or verification applications where the number of categories is very large an...
Sumit Chopra, Raia Hadsell, Yann LeCun
ITC
2003
IEEE
222views Hardware» more  ITC 2003»
13 years 12 months ago
Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Mahesh A. Iyer