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TPHOL
2009
IEEE
14 years 3 months ago
A Formalisation of Smallfoot in HOL
In this paper a general framework for separation logic inside the HOL theorem prover is presented. This framework is based on Abeparation Logic. It contains a model of an abstract,...
Thomas Tuerk
ICCD
2004
IEEE
137views Hardware» more  ICCD 2004»
14 years 5 months ago
Comparative Study of Strategies for Formal Verification of High-Level Processors
Compared are different methods for evaluation of formulas expressing microprocessor correctness in the logic of Equality with Uninterpreted Functions and Memories (EUFM) by transl...
Miroslav N. Velev
ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
14 years 3 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
CSL
1999
Springer
14 years 1 months ago
Pre-logical Relations
Abstract. We study a weakening of the notion of logical relations, called prelogical relations, that has many of the features that make logical relations so useful but having furth...
Furio Honsell, Donald Sannella
TVLSI
2002
111views more  TVLSI 2002»
13 years 8 months ago
Circular BIST with state skipping
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
Nur A. Touba