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FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
14 years 28 days ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
FMCAD
2004
Springer
14 years 13 days ago
A Functional Approach to the Formal Specification of Networks on Chip
We present a functional approach, based on the ACL2 logic, for the specification of system on a chip communication architectures. Our decomposition of the communications allows the...
Julien Schmaltz, Dominique Borrione
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ENTCS
2007
104views more  ENTCS 2007»
13 years 8 months ago
Lazy Context Cloning for Non-Deterministic Graph Rewriting
We define a rewrite strategy for a class of non-confluent constructor-based term graph rewriting systems and discuss its correctness. Our strategy and its extension to narrowing...
Sergio Antoy, Daniel W. Brown, Su-Hui Chiang
IPL
2008
102views more  IPL 2008»
13 years 8 months ago
The connection between two ways of reasoning about partial functions
Undefined terms involving the application of partial functions and operators are common in program specifications and in discharging proof obligations that arise in design. One wa...
John S. Fitzgerald, Cliff B. Jones