142 search results - page 24 / 29 » Functional test generation for non-scan sequential circuits |
EURODAC
1994
IEEE
14 years 1 months ago
1994
IEEE
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
ET
2007
13 years 9 months ago
2007
Abstract In order to perform an on-chip test for characterizing both static and transmission parameters of embedded analog-to-digital converters (ADCs), this paper presents an osci...
CCE
2007
13 years 9 months ago
2007
For systems where exact constitutive relations are unknown, a microscopic level description can be alternatively used. As microscopic simulations are computationally expensive, th...
ISMVL
2007
IEEE
14 years 4 months ago
2007
IEEE
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
CORR
2008
Springer
13 years 10 months ago
2008
Springer
This paper presents an analysis and system-level design of a capacitive harvester of vibration energy composed from a mechanical resonator, capacitive transducer and a conditioning...