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DATE
2000
IEEE
130views Hardware» more  DATE 2000»
14 years 8 days ago
Optimal Hardware Pattern Generation for Functional BIST
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, H...
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
14 years 1 months ago
FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations
In today’s embedded applications a significant portion of energy is spent in the memory subsystem. Several approaches have been proposed to minimize this energy, including the u...
Ilya Issenin, Nikil D. Dutt
TCAD
2008
81views more  TCAD 2008»
13 years 7 months ago
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
Stephen Plaza, Igor L. Markov, Valeria Bertacco
ECAI
2010
Springer
13 years 9 months ago
Bayesian Monte Carlo for the Global Optimization of Expensive Functions
In the last decades enormous advances have been made possible for modelling complex (physical) systems by mathematical equations and computer algorithms. To deal with very long run...
Perry Groot, Adriana Birlutiu, Tom Heskes
RTSS
2007
IEEE
14 years 2 months ago
Optimal Discrete Rate Adaptation for Distributed Real-Time Systems
Many distributed real-time systems face the challenge of dynamically maximizing system utility and meeting stringent resource constraints in response to fluctuations in system wo...
Yingming Chen, Chenyang Lu, Xenofon D. Koutsoukos