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MICRO
2002
IEEE
143views Hardware» more  MICRO 2002»
14 years 3 months ago
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
Enric Gibert, F. Jesús Sánchez, Anto...
SIGMOD
2010
ACM
249views Database» more  SIGMOD 2010»
14 years 3 months ago
Active knowledge: dynamically enriching RDF knowledge bases by web services
The proliferation of knowledge-sharing communities and the advances in information extraction have enabled the construction of large knowledge bases using the RDF data model to re...
Nicoleta Preda, Gjergji Kasneci, Fabian M. Suchane...
SIGMOD
2010
ACM
207views Database» more  SIGMOD 2010»
14 years 3 months ago
Automatic contention detection and amelioration for data-intensive operations
To take full advantage of the parallelism offered by a multicore machine, one must write parallel code. Writing parallel code is difficult. Even when one writes correct code, the...
John Cieslewicz, Kenneth A. Ross, Kyoho Satsumi, Y...
CF
2009
ACM
14 years 2 months ago
Non-clairvoyant speed scaling for batched parallel jobs on multiprocessors
Energy consumption and heat dissipation have become key considerations for modern high performance computer systems. In this paper, we focus on non-clairvoyant speed scaling to mi...
Hongyang Sun, Yangjie Cao, Wen-Jing Hsu
DAC
2009
ACM
14 years 2 months ago
Vicis: a reliable network for unreliable silicon
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacc...
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