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» Future Performance Challenges in Nanometer Design
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117
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DAC
2009
ACM
16 years 4 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
130
Voted
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
15 years 10 months ago
Dimensioning heterogeneous MPSoCs via parallelism analysis
—In embedded computing we face a continuously growing algorithm complexity combined with a constantly rising number of applications running on a single system. Multi-core systems...
Bastian Ristau, Torsten Limberg, Oliver Arnold, Ge...
155
Voted
ELECTRONICMARKETS
2011
140views more  ELECTRONICMARKETS 2011»
14 years 10 months ago
Reaching into patients' homes - participatory designed AAL services - The case of a patient-centered nutrition tracking service
Abstract Ambient Assisted Living (AAL) offers possibilities for promising new IT-based health care services that are resulting in new challenges for its design process. We introduc...
Philipp Menschner, Andreas Prinz, Philip Koene, Fe...
169
Voted
CCECE
2006
IEEE
15 years 9 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
139
Voted
DATE
2009
IEEE
140views Hardware» more  DATE 2009»
15 years 10 months ago
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors
Carbon Nanotube Field-Effect Transistors (CNFETs) show big promise as extensions to silicon-CMOS because: 1) Ideal CNFETs can provide significant energy and performance benefits o...
Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei