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165
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PC
2007
161views Management» more  PC 2007»
15 years 4 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
115
Voted
EUROITV
2008
Springer
15 years 5 months ago
'I Want My HDTV'? Underlying Factors of Perceived Usefulness for High Definition Television
Abstract. While traditional technology acceptance models concentrate on relationships between usefulness and acceptance, they leave unresolved the questions about why a certain tec...
Eva Baaren, Lidwien van de Wijngaert, Erik Huizer
138
Voted
DAC
2005
ACM
16 years 5 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
BTW
1999
Springer
145views Database» more  BTW 1999»
15 years 9 months ago
A Multi-Tier Architecture for High-Performance Data Mining
Data mining has been recognised as an essential element of decision support, which has increasingly become a focus of the database industry. Like all computationally expensive data...
Ralf Rantzau, Holger Schwarz
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
16 years 1 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi