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ISSS
1999
IEEE
126views Hardware» more  ISSS 1999»
14 years 1 months ago
Catalyst: A DSIP Design Flow Development in Industry
The Motorola System on Chip Design Technologies (SoCDT) team aims at providing a system design environment for its customers. The Toulouse branch concentrates on design efforts in...
W. De Rammelaere, K. Eckert, T. Lawell, R. McGarit...
CSMR
2002
IEEE
14 years 1 months ago
Reengineering to the Web: A Reference Architecture
Reengineering existing (large-scale) applications to the web is a complex and highly challenging task. This is due to a variety of mostly demanding requirements for interactive we...
Uwe Zdun
ISPASS
2006
IEEE
14 years 3 months ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
TPDS
2010
174views more  TPDS 2010»
13 years 7 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
WWW
2006
ACM
14 years 9 months ago
Designing an architecture for delivering mobile information services to the rural developing world
Paper plays a crucial role in many developing world information practices. However, paper-based records are inefficient, error-prone and difficult to aggregate. Therefore we need ...
Tapan S. Parikh, Edward D. Lazowska