- Processor scheduling in distributed-memory systems has received considerable attention in recent years. Several commercial distributed-memory systems use spacesharing processor s...
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
Allowing loads to issue out-of-order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Blindl...
Reader preference, writer preference, and task-fair readerwriter locks are shown to cause undue blocking in multiprocessor real-time systems. A new phase-fair reader-writer lock i...
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...