694 search results - page 41 / 139 » Gate Sizing Using a Statistical Delay Model |
DAC
2003
ACM
14 years 10 months ago
2003
ACM
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
CVPR
1998
IEEE
14 years 11 months ago
1998
IEEE
Stereo sequences promise to be a powerful method for segmenting images for applications such as tracking human figures. We present a method of statistical background modeling for ...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
INFOCOM
2003
IEEE
14 years 2 months ago
2003
IEEE
Abstract— We investigate a widely popular Least-RecentlyUsed (LRU) cache replacement algorithm with semi-Markov modulated requests. Semi-Markov processes provide the flexibility...