694 search results - page 50 / 139 » Gate Sizing Using a Statistical Delay Model |
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Nanometer circuits are becoming increasingly susceptible to soft-errors due to alpha-particle and atmospheric neutron strikes as device scaling reduces node capacitances and suppl...
TCAD
2010
13 years 3 months ago
2010
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this ...
TWC
2008
13 years 9 months ago
2008
In this paper the tradeoff between energy and delay for wireless networks is studied. A network using a request-to-send (RTS) and clear-to-send (CTS) type medium access control (M...
SECON
2008
IEEE
14 years 3 months ago
2008
IEEE
—Delay Tolerant Networks are wireless networks where disconnections may occur frequently due to propagation phenomena, node mobility, and power outages. Propagation delays may al...