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» Gate Sizing Using a Statistical Delay Model
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PACS
2000
Springer
132views Hardware» more  PACS 2000»
14 years 18 days ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...
DSP
2006
13 years 9 months ago
On the application of cross correlation function to subsample discrete time delay estimation
Cross correlation function (CCF) of signals is an important tool of multi-sensors signal processing. Parabola functions are commonly used as parametric models of the CCF in time d...
Lei Zhang 0006, Xiaolin Wu
ICC
2007
IEEE
110views Communications» more  ICC 2007»
14 years 3 months ago
Resource Optimization to Provision a Virtual Private Network Using the Hose Model
— Virtual Private Networks (VPN) provide a secure and reliable communication between customer sites over a shared network. With increase in number and size of VPNs, providers nee...
Monia Ghobadi, Sudhakar Ganti, Gholamali C. Shoja
BMCBI
2008
93views more  BMCBI 2008»
13 years 9 months ago
Using iterative cluster merging with improved gap statistics to perform online phenotype discovery in the context of high-throug
Background: The recent emergence of high-throughput automated image acquisition technologies has forever changed how cell biologists collect and analyze data. Historically, the in...
Zheng Yin, Xiaobo Zhou, Chris Bakal, Fuhai Li, You...
CASES
2007
ACM
14 years 1 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...