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» Gate Sizing Using a Statistical Delay Model
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ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
13 years 8 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...
VALUETOOLS
2006
ACM
156views Hardware» more  VALUETOOLS 2006»
14 years 4 months ago
TCP-Illinois: a loss and delay-based congestion control algorithm for high-speed networks
— We introduce a new congestion control algorithm for high speed networks, called TCP-Illinois. TCP-Illinois uses packet loss information to determine whether the window size sho...
Shao Liu, Tamer Basar, R. Srikant
ICECCS
2007
IEEE
125views Hardware» more  ICECCS 2007»
14 years 2 months ago
Achieving Discrete Relative Timing with Untimed Process Algebra
For many systems, timing aspects are essential. Therefore, when modelling these systems, time should somehow be represented. In the past, many timed process algebras have been dev...
Anton Wijs
INFOCOM
2005
IEEE
14 years 3 months ago
An analytic framework for modeling peer to peer networks
Abstract—This paper presents an analytic framework to evaluate the performance of peer to peer (P2P) networks. Using the time to download or replicate an arbitrary file as the m...
Krishna K. Ramachandran, Biplab Sikdar
VTC
2007
IEEE
14 years 4 months ago
Including Diffuse Multipath Parameters in MIMO Channel Models
Abstract— Recent findings suggest to split the impulse response of the radio channel into discrete paths and the “diffuse multipath” (DMP). This diffuse part can be describe...
Nicolai Czink, Andreas Richter, Ernst Bonek, Jukka...