694 search results - page 95 / 139 » Gate Sizing Using a Statistical Delay Model |
BMCBI
2010
13 years 7 months ago
2010
Background: Most genomic data have ultra-high dimensions with more than 10,000 genes (probes). Regularization methods with L1 and Lp penalty have been extensively studied in survi...
INFOCOM
1997
IEEE
14 years 1 months ago
1997
IEEE
The workload of the global Internet is dominated by the Hypertext Transfer Protocol (HTTP), an application protocol used by World Wide Web clients and servers. Simulation studies ...
ICCAD
2006
IEEE
14 years 7 months ago
2006
IEEE
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
SIGMOD
2006
ACM
14 years 10 months ago
2006
ACM
Data stream applications have made use of statistical summaries to reason about the data using nonparametric tools such as histograms, heavy hitters, and join sizes. However, rela...
FPGA
2003
ACM
14 years 3 months ago
2003
ACM
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...