2 search results - page 1 / 1 » Gate sizing using Lagrangian relaxation combined with a fast... |
ICCAD
2002
IEEE
14 years 6 months ago
2002
IEEE
─ In this paper, we present Forge, an optimal algorithm for gate sizing using the Elmore delay model. The algorithm utilizes Lagrangian relaxation with a fast gradient-based pre-...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
We present an efficient and accurate gate sizing tool that employs a novel piecewise convex delay model, handling both rise and fall delays, for static CMOS gates. The delay model...