268 search results - page 14 / 54 » Gating currents |
ACSD
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Clock gating and operand isolation are two techniques to reduce the power consumption in state-of-the-art hardware designs. Both approaches basically follow a two-step pr...
TMI
2010
13 years 2 months ago
2010
We present a novel method for joint reconstruction of both image and motion in positron-emission-tomography (PET). Most other methods separate image from motion estimation: They us...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...