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DAC
2008
ACM
14 years 8 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
SIGECOM
2010
ACM
164views ECommerce» more  SIGECOM 2010»
14 years 9 days ago
Automated market-making in the large: the gates hillman prediction market
We designed and built the Gates Hillman Prediction Market (GHPM) to predict the opening day of the Gates and Hillman Centers, the new computer science buildings at Carnegie Mellon...
Abraham Othman, Tuomas Sandholm
DELTA
2006
IEEE
13 years 11 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor
DAC
2008
ACM
14 years 8 months ago
Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness
The threshold voltage (Vth) of a nanoscale transistor is severely affected by random dopant fluctuations and line-edge roughness. The analysis of these effects usually requires at...
Yun Ye, Frank Liu, Sani R. Nassif, Yu Cao
CARDIS
2008
Springer
153views Hardware» more  CARDIS 2008»
13 years 9 months ago
Ultra-Lightweight Implementations for Smart Devices - Security for 1000 Gate Equivalents
In recent years more and more security sensitive applications use passive smart devices such as contactless smart cards and RFID tags. Cost constraints imply a small hardware footp...
Carsten Rolfes, Axel Poschmann, Gregor Leander, Ch...