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FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 21 days ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
INFOCOM
2002
IEEE
14 years 12 days ago
Avoiding Instability during Graceful Shutdown of OSPF
Abstract—Many recent router architectures decouple the routing engine from the forwarding engine, so that packet forwarding can continue even when the routing process is not acti...
Aman Shaikh, Rohit Dube, Anujan Varma
IPPS
1998
IEEE
13 years 11 months ago
Partial Rearrangements of Space-Shared FPGAs
Abstract Oliver Diessel1 and Hossam ElGindy2 1Department of Computer Science and Software Engineering 2Department of Electrical and Computer Engineering The University of Newcastle...
Oliver Diessel, Hossam A. ElGindy
NSDI
2008
13 years 9 months ago
Designing and Implementing Malicious Hardware
Hidden malicious circuits provide an attacker with a stealthy attack vector. As they occupy a layer below the entire software stack, malicious circuits can bypass traditional defe...
Samuel T. King, Joseph Tucek, Anthony Cozzie, Chri...
TCSV
2008
129views more  TCSV 2008»
13 years 7 months ago
Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine
Since motion-compensated temporal filtering (MCTF) becomes an important temporal prediction scheme in video coding algorithms, this paper presents an efficient temporal prediction ...
Yi-Hau Chen, Chih-Chi Cheng, Tzu-Der Chuang, Ching...