In this paper we present a genetic algorithm-based approach towards designing self-assembling objects comprised of square smart blocks. Each edge of each block can have one of thr...
Ying Guo, Geoff Poulton, Philip Valencia, Geoff Ja...
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Tagging schemes have been used in security protocols to ensure that the analysis of such protocols can work with messages of bounded length. When the set of nonces is bounded, this...
In many data mining tools that support regression tasks, training data are stored in a single table containing both the target field (dependent variable) and the attributes (indepe...