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ASPLOS
2006
ACM
15 years 10 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
SOCO
2007
Springer
15 years 10 months ago
Patterns of Component Evolution
Contemporary software systems are composed of many components, which, in general, undergo phased and incremental development. In order to facilitate the corresponding construction ...
Rajesh Vasa, Markus Lumpe, Jean-Guy Schneider
DAC
2009
ACM
15 years 8 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
ASPLOS
2004
ACM
15 years 9 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
BMCBI
2008
116views more  BMCBI 2008»
15 years 4 months ago
Structuring an event ontology for disease outbreak detection
Background: This paper describes the design of an event ontology being developed for application in the machine understanding of infectious disease-related events reported in natu...
Ai Kawazoe, Hutchatai Chanlekha, Mika Shigematsu, ...