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IEEEPACT
2002
IEEE
14 years 10 days ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
IEEEPACT
2002
IEEE
14 years 10 days ago
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning
This paper presents a new modulo scheduling algorithm for clustered microarchitectures. The main feature of the proposed scheme is that the assignment of instructions to clusters ...
Alex Aletà, Josep M. Codina, F. Jesú...
JSA
2008
74views more  JSA 2008»
13 years 7 months ago
Resource conflict detection in simulation of function unit pipelines
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
Pekka Jääskeläinen, Vladimír...
VLDB
1995
ACM
214views Database» more  VLDB 1995»
13 years 11 months ago
Dynamic Multi-Resource Load Balancing in Parallel Database Systems
Parallel database systems have to support the effective parallelization of complex queries in multi-user mode, i.e. in combination with inter-query/inter-transaction parallelism. ...
Erhard Rahm, Robert Marek
SPAA
2006
ACM
14 years 1 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...