We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
Effective testing of safety-critical real-time embedded software is difficult and expensive. Many companies are hesitant about the cost of formalized criteria-based testing and a...
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
This paper addresses issues involved when an architect explore alternative designs including non-functional requirements; in our approach, non-functional requirements are expresse...
Lihua Xu, Scott A. Hendrickson, Eric Hettwer, Hada...