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CF
2004
ACM
14 years 9 days ago
Reducing traffic generated by conflict misses in caches
Off-chip memory accesses are a major source of power consumption in embedded processors. In order to reduce the amount of traffic between the processor and the off-chip memory as ...
Pepijn J. de Langen, Ben H. H. Juurlink
ADHOC
2007
135views more  ADHOC 2007»
13 years 8 months ago
Mitigating the gateway bottleneck via transparent cooperative caching in wireless mesh networks
Wireless mesh networks (WMNs) have been proposed to provide cheap, easily deployable and robust Internet access. The dominant Internet-access traffic from clients causes a congest...
Saumitra M. Das, Himabindu Pucha, Y. Charlie Hu
CCS
2008
ACM
13 years 10 months ago
Deconstructing new cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks present a serious threat to computer systems. Previously proposed countermeasures were either too costly for practical use or only effect...
Jingfei Kong, Onur Aciiçmez, Jean-Pierre Se...
ISLPED
2003
ACM
127views Hardware» more  ISLPED 2003»
14 years 1 months ago
Lightweight set buffer: low power data cache for multimedia application
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
Jun Yang 0002, Youtao Zhang
CF
2005
ACM
13 years 10 months ago
Skewed caches from a low-power perspective
The common approach to reduce cache conflicts is to increase the associativity. From a dynamic power perspective this associativity comes at a high cost. In this paper we present...
Mathias Spjuth, Martin Karlsson, Erik Hagersten