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FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
14 years 2 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
ICC
2007
IEEE
14 years 1 months ago
A Statistical Bit Error Generator for Emulation of Complex Forward Error Correction Schemes
— Forward Error Correction (FEC) schemes are generally used in wireless communication systems to maintain an acceptable quality of service. Various models have been proposed in l...
Reuben A. Farrugia, Carl James Debono
FGR
2006
IEEE
263views Biometrics» more  FGR 2006»
14 years 1 months ago
Robust Head Tracking Based on a Multi-State Particle Filter
This paper proposes a novel method for robust and automatic realtime head tracking by fusing face and head cues within a multi-state particle filter. Due to large appearance vari...
Yuan Li, Haizhou Ai, Chang Huang, Shihong Lao
GLOBECOM
2006
IEEE
14 years 1 months ago
Content Delivery in Overlay Networks: a Stochastic Graph Processes Perspective
— We consider the problem of distributing a content of finite size to a group of users connected through an overlay network that is built by a peer-to-peer application. The goal...
Damiano Carra, Renato Lo Cigno, Ernst W. Biersack
DAC
2006
ACM
14 years 1 months ago
Clock buffer and wire sizing using sequential programming
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...