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ICS
2009
Tsinghua U.
14 years 2 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
GLVLSI
2008
IEEE
183views VLSI» more  GLVLSI 2008»
13 years 9 months ago
An analytical model for the upper bound on temperature differences on a chip
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be u...
Shervin Sharifi, Tajana Simunic Rosing
KBSE
2009
IEEE
14 years 2 months ago
SMT-Based Bounded Model Checking for Embedded ANSI-C Software
Propositional bounded model checking has been applied successfully to verify embedded software but is limited by the increasing propositional formula size and the loss of structur...
Lucas Cordeiro, Bernd Fischer, João Marques...
VTC
2008
IEEE
236views Communications» more  VTC 2008»
14 years 2 months ago
Apriori-LLR-Threshold-Assisted K-Best Sphere Detection for MIMO Channels
—When the maximum number of best candidates retained at each tree search level of the K-Best Sphere Detection (SD) is kept low for the sake of maintaining a low memory requiremen...
Li Wang, Lei Xu, Sheng Chen, Lajos Hanzo
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...