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» Generating high performance pruned FFT implementations
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CCGRID
2006
IEEE
14 years 1 months ago
Proposal of MPI Operation Level Checkpoint/Rollback and One Implementation
With the increasing number of processors in modern HPC(High Performance Computing) systems, there are two emergent problems to solve. One is scalability, the other is fault tolera...
Yuan Tang, Graham E. Fagg, Jack Dongarra
ICCAD
1994
IEEE
110views Hardware» more  ICCAD 1994»
13 years 11 months ago
Test pattern generation based on arithmetic operations
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...
Sanjay Gupta, Janusz Rajski, Jerzy Tyszer
FPL
2005
Springer
113views Hardware» more  FPL 2005»
14 years 1 months ago
Ziggurat-based Hardware Gaussian Random Number Generator
An architecture and implementation of a high performance Gaussian random number generator (GRNG) is described. The GRNG uses the Ziggurat algorithm which divides the area under th...
Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee,...
CVPR
2005
IEEE
14 years 9 months ago
Feature Kernel Functions: Improving SVMs Using High-Level Knowledge
Kernel functions are often cited as a mechanism to encode prior knowledge of a learning task. But it can be difficult to capture prior knowledge effectively. For example, we know ...
Qiang Sun, Gerald DeJong
IJCNN
2006
IEEE
14 years 1 months ago
Complex Systems Modeling Using Scale-Free Highly-Clustered Echo State Network
— Inspired by the universal laws governing different kinds of complex networks, we propose a scale-free highlyclustered echo state network (SHESN). Different from echo state netw...
Zhidong Deng, Yi Zhang