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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
14 years 7 days ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
NAACL
1994
13 years 10 months ago
Recent Improvements in the CMU Spoken Language Understanding System
We have been developing a spoken language system to recognize and understand spontaneous speech. It is difficult for such systems to achieve good coverage of the lexicon and gramm...
Wayne Ward, Sunil Issar
TVLSI
2002
79views more  TVLSI 2002»
13 years 8 months ago
Electrical and optical clock distribution networks for gigascale microprocessors
A summary of electrical and optical approaches to clock distribution within high-performance microprocessors is presented. System-level properties of intrachip electrical clock dis...
A. V. Mule, Elias N. Glytsis, Thomas K. Gaylord, J...
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
13 years 13 days ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
SIGADA
2001
Springer
14 years 1 months ago
Targeting Ada95/DSA for distributed simulation of multiprotocol communication networks
The last years have seen an increasing, albeit restricted simulation of large-scale networks on shared memory parallel platforms. As the complexity of communication protocols and ...
Dhavy Gantsou