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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 8 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
TVLSI
2008
152views more  TVLSI 2008»
13 years 7 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
SIGMETRICS
1994
ACM
113views Hardware» more  SIGMETRICS 1994»
13 years 12 months ago
Shade: A Fast Instruction-Set Simulator for Execution Profiling
Shade is an instruction-set simulator and custom trace generator. Application programs are executed and traced under the control of a user-supplied trace analyzer. To reduce commu...
Robert F. Cmelik, David Keppel
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 2 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
ASPLOS
2008
ACM
13 years 9 months ago
Dispersing proprietary applications as benchmarks through code mutation
Industry vendors hesitate to disseminate proprietary applications to academia and third party vendors. By consequence, the benchmarking process is typically driven by standardized...
Luk Van Ertvelde, Lieven Eeckhout