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MASCOTS
2010
13 years 9 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...
ISPASS
2005
IEEE
14 years 1 months ago
BioBench: A Benchmark Suite of Bioinformatics Applications
Recent advances in bioinformatics and the significant increase in computational power available to researchers have made it possible to make better use of the vast amounts of gene...
Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Mano...
DAC
1995
ACM
13 years 11 months ago
Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores
Application domain specific DSP cores are becoming increasingly popular due to their advantageous trade–off between flexibility and cost. However, existing code generation metho...
Adwin H. Timmer, Marino T. J. Strik, Jef L. van Me...
PLDI
2000
ACM
14 years 6 days ago
Exploiting superword level parallelism with multimedia instruction sets
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
Samuel Larsen, Saman P. Amarasinghe
CODES
2007
IEEE
14 years 2 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...