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IPPS
2009
IEEE
14 years 2 months ago
Performance projection of HPC applications using SPEC CFP2006 benchmarks
Performance projections of High Performance Computing (HPC) applications onto various hardware platforms are important for hardware vendors and HPC users. The projections aid hard...
Sameh Sharkawi, Don DeSota, Raj Panda, Rajeev Indu...
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 2 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
ASM
2008
ASM
13 years 10 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
CHES
2008
Springer
132views Cryptology» more  CHES 2008»
13 years 10 months ago
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
Philipp Grabher, Johann Großschädl, Dan...
PPOPP
2006
ACM
14 years 1 months ago
A case study in top-down performance estimation for a large-scale parallel application
This work presents a general methodology for estimating the performance of an HPC workload when running on a future hardware architecture. Further, it demonstrates the methodology...
Ilya Sharapov, Robert Kroeger, Guy Delamarter, Raz...