647 search results - page 104 / 130 » Generation of BDDs from hardware algorithm descriptions |
AICCSA
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper, we present a novel type and effect analysis for detecting type cast errors and memory errors in C source code. Our approach involves a type system with effect, regi...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— Depth information indicates the distance of an object in the three dimensional (3D) scene from the camera view-point, typically represented by eight bits. Since the depth map i...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
ISLPED
2006
ACM
14 years 1 months ago
2006
ACM
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
SBACPAD
2003
IEEE
14 years 1 months ago
2003
IEEE
— Scheduling by Edge Reversal (SER) is a fully distributed scheduling mechanism based on the manipulation of acyclic orientations of a graph. This work uses SER to perform constr...