647 search results - page 10 / 130 » Generation of BDDs from hardware algorithm descriptions |
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
IEEEPACT
2009
IEEE
13 years 5 months ago
2009
IEEE
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...
POPL
2010
ACM
14 years 5 months ago
2010
ACM
Despite years of work on retargetable compilers, creating a good, reliable back end for an optimizing compiler still entails a lot of hard work. Moreover, a critical component of ...
WEBI
2007
Springer
14 years 1 months ago
2007
Springer
Different ontologies used in semantic web services fields raise numerous interoperation and communication problems with respect to service discovery, composition, and execution. ...