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» Generation of BDDs from hardware algorithm descriptions
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CODES
2006
IEEE
14 years 1 months ago
Automatic generation of transaction level models for rapid design space exploration
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rain...
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
14 years 25 days ago
Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog Circuits
In this paper we introduce an approach for parameter controlled symbolic analysis of nonlinear analog circuits. Based on a state-of–the-art algorithm, it enables the removal of ...
Ralf Popp, Joerg Oehmen, Lars Hedrich, Erich Barke
SEMWEB
2004
Springer
14 years 1 months ago
Dynamic Agent Composition from Semantic Web Services
Abstract. The shift from Web pages to Web services enables programmatic access to the near limitless information on the World Wide Web. Autonomous agents should generate concise an...
Michael Czajkowski, Anna L. Buczak, Martin O. Hofm...
ETS
2006
IEEE
119views Hardware» more  ETS 2006»
14 years 1 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
ISCAS
2008
IEEE
112views Hardware» more  ISCAS 2008»
14 years 2 months ago
Glitch-aware output switching activity from word-level statistics
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...