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» Generation of BDDs from hardware algorithm descriptions
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ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
14 years 4 days ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 1 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
KES
2010
Springer
13 years 6 months ago
W-kmeans: Clustering News Articles Using WordNet
 Document clustering is a powerful technique that has been widely used for organizing data into smaller and manageable information kernels. Several approaches have been proposed...
Christos Bouras, Vassilis Tsogkas
POPL
2010
ACM
14 years 5 months ago
From Program Verification to Program Synthesis
This paper describes a novel technique for the synthesis of imperative programs. Automated program synthesis has the potential to make programming and the design of systems easier...
Saurabh Srivastava, Sumit Gulwani, Jeffrey S. Fost...
CAV
2004
Springer
154views Hardware» more  CAV 2004»
13 years 11 months ago
Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qa...