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» Generation of BDDs from hardware algorithm descriptions
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CODES
2005
IEEE
14 years 1 months ago
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
Ümit Y. Ogras, Jingcao Hu, Radu Marculescu
ECCV
2002
Springer
14 years 9 months ago
Eye Gaze Correction with Stereovision for Video-Teleconferencing
Abstract. The lack of eye contact in desktop video teleconferencing substantially reduces the effectiveness of video contents. While expensive and bulky hardware is available on th...
Ruigang Yang, Zhengyou Zhang
AICCSA
2008
IEEE
216views Hardware» more  AICCSA 2008»
13 years 8 months ago
Mining fault tolerant frequent patterns using pattern growth approach
Mining fault tolerant (FT) frequent patterns from transactional datasets are very complex than mining all frequent patterns (itemsets), in terms of both search space exploration a...
Shariq Bashir, Zahid Halim, Abdul Rauf Baig
DAC
1997
ACM
14 years 2 days ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 1 months ago
A Field Programmable RFID Tag and Associated Design Flow
Current Radio Frequency Identification (RFID) systems generally have long design times and low tolerance to changes in specification. This paper describes a field programmable,...
Alex K. Jones, Raymond R. Hoare, Swapna R. Donthar...