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» Generative Operational Semantics for Relaxed Memory Models
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ACSAC
2009
IEEE
14 years 3 months ago
Protecting Kernel Code and Data with a Virtualization-Aware Collaborative Operating System
Abstract—The traditional virtual machine usage model advocates placing security mechanisms in a trusted VM layer and letting the untrusted guest OS run unaware of the presence of...
Daniela Alvim Seabra de Oliveira, Shyhtsun Felix W...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 8 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
13 years 3 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
TPHOL
2009
IEEE
14 years 3 months ago
A Better x86 Memory Model: x86-TSO
Abstract. Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory mode...
Scott Owens, Susmit Sarkar, Peter Sewell
ENTCS
2007
97views more  ENTCS 2007»
13 years 8 months ago
An Operational Semantics for Shared Messaging Communication
Shared Messaging Communication (SMC) has been introduced in [9] as a model of communication which reduces communication costs (both in terms of communication latency and memory us...
Astrid Kiehn