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JCP
2008
114views more  JCP 2008»
13 years 7 months ago
IntelligenTester - Test Sequence Optimization Framework using Multi-Agents
- Our paper focuses on the generation of optimal test sequences and test cases using Intelligent Agents for highly reliable systems. Test sequences support test case generation for...
D. Jeya Mala, V. Mohan
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
14 years 1 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
ETS
2000
IEEE
126views Hardware» more  ETS 2000»
13 years 7 months ago
Dynamic Goal-Based Role-Play Simulation on the Web: A Case Study
This paper outlines and discusses the pedagogical approach, the technical design architecture, and an innovative implementation of a collaborative role-play simulation technology ...
Som Naidu, Albert Ip, Roni Linser
ANCS
2009
ACM
13 years 5 months ago
Design and performance analysis of a DRAM-based statistics counter array architecture
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim...
DSD
2005
IEEE
105views Hardware» more  DSD 2005»
14 years 1 months ago
Improved Fault Emulation for Synchronous Sequential Circuits
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, R...