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DATE
2010
IEEE
159views Hardware» more  DATE 2010»
14 years 15 days ago
A rapid prototyping system for error-resilient multi-processor systems-on-chip
—Static and dynamic variations, which have negative impact on the reliability of microelectronic systems, increase with smaller CMOS technology. Thus, further downscaling is only...
Matthias May, Norbert Wehn, Abdelmajid Bouajila, J...
DAC
2006
ACM
14 years 8 months ago
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
Xinping Zhu, Wei Qin
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 9 days ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
CODES
2002
IEEE
14 years 11 days ago
Design of multi-tasking coprocessor control for Eclipse
Eclipse defines a heterogeneous multiprocessor architecture template for data-dependent stream processing. Intended as a scalable and flexible subsystem of forthcoming media-proce...
Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert...
ISADS
1999
IEEE
13 years 11 months ago
Distributed Component-based Tailorability for CSCW Applications
Tailorability is generally regarded as a key property of groupware systems due to the dynamics and diversity of cooperative work. This article investigates the use of software com...
Oliver Stiemerling, Ralph Hinken, Armin B. Cremers