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HIPEAC
2007
Springer
15 years 10 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 10 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
SIGIR
2005
ACM
15 years 10 months ago
Orthogonal locality preserving indexing
We consider the problem of document indexing and representation. Recently, Locality Preserving Indexing (LPI) was proposed for learning a compact document subspace. Different from...
Deng Cai, Xiaofei He
SLIP
2005
ACM
15 years 10 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
SPAA
2005
ACM
15 years 10 months ago
Randomization does not reduce the average delay in parallel packet switches
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Hagit Attiya, David Hay