Congestion prediction in early stages

Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominant factor of the overall performance of a circuit. In order to optimize interconnect cost, we need a good congestion estimation method to predict routability in the early stages of the design cycle. Many congestion models have been proposed but there’s still a lot of room for improvement. Some existing models [6] are dependent on parameters that are related to the actual congestion of the circuits. Besides, routers will perform rip-up and re-route operations to prevent overflow but most models do not consider this case. The outcome is that the existing models will usually underestimate the routability. In this paper, we propose a new congestion model to solve the above problems. The estimation process is divided into three steps: preliminary estimation, detailed estimation and congestion redistribution. We ...

• Type: Conference
• Year: 2005
• Where: SLIP
• Authors: Chiu-Wing Sham, Evangeline F. Y. Young
• Keywords: Actual Congestion, Computer Networks, Congestion Estimation Method, Congestion Model, SLIP 2005