545 search results - page 30 / 109 » Global Register Partitioning |
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
Cost effective SOC test strongly hinges on parallel, independent test of SOC cores, which can only be ensured through proper core isolation techniques. While a core isolation mech...
SAMOS
2004
Springer
14 years 2 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
ANTSW
2004
Springer
14 years 12 days ago
2004
Springer
ed Abstract We present two heuristic mesh-partitioning methods, both of which build on the multiple ant-colony algorithm in order to improve the quality of the mesh partitions. The...
RSP
2006
IEEE
14 years 2 months ago
2006
IEEE
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...