545 search results - page 7 / 109 » Global Register Partitioning |
APLAS
2006
ACM
14 years 10 days ago
2006
ACM
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
ICPR
2006
IEEE
14 years 2 months ago
2006
IEEE
We present a method to construct a mosaic from multiple color and fluorescein retinal images. A set of images taken from different views at different times is difficult to registe...
ICCD
2000
IEEE
14 years 5 months ago
2000
IEEE
We introduce a new register file architecture that provides both row-wise and column-wise accesses, thus allowing partitioned instructions to be used in columnwise processing with...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Multivoltage scheduling (MVS) for datapaths offers the energy savings of voltage scaling on a per-operation basis with a voltage aware operator scheduling. This work investigates...
DATE
2004
IEEE
14 years 10 days ago
2004
IEEE
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...